The Blitz-64 Computer System

“Rethinking Systems Architecture”

Overview

Blitz-64 is a complete computer design, including machine architecture, software tools, programming language, operating system, and hardware design files, as well as documentation and additional support material. Blitz-64 is open source and free.

Features

Instruction Set Architecture (64-bit, floating point, virtual memory MMU, exception handling, etc.)
KPL: Kernel Programming Langauge
Machine Code Emulator / Virtual Machine
Verilog Code for Hardware Implementations
Assembler, Linker, KPL Compiler, Emulator (implemented in C/C++)
Assembler, Linker, KPL Compiler (implemented in KPL)
Operating System: BlitzOS (including shell and command-line tools)
Documentation: Reference Manuals, Overviews, Examples
Videos
KPL and Assembly Code Examples

Project Datasheet
ISA Reference Card

This is Version 2.1, dated 14 December 2023

What's new? click here (Last updated 14 December 2023.)
Access to the previous version: Version 2.0

Recent Changes:
    • Changes to ISA - 14 December 2023
    • xv6 OS kernel - 14 December 2023
    • Verilog code for FPGA core - 14 December 2023
    • Documentation updates - 14 December 2023

Documentation

ISA Reference Card (6 pages)
A quick-start overview of the Instruction Set Architecture. pdf
Blitz-64: Summary of the Machine Architecture (19 pages)
An introduction to the Instruction Set Architecture (ISA). Also comments about the overall Blitz-64 project. pdf
Blitz-64: Instruction Set Architecture - Reference Manual (342 pages)
This document describes the Instruction Set Architecture (ISA) for the Blitz-64 processor core. It documents all the machine instructions as well as the assembly code notation for these instructions. pdf
Blitz-64: Assembler, Linker, and Object File Format (286 pages)
This document describes the Assembler and Linker. It also describes tools "dumpobj" and "createlib" and well as the format of object, library, and executable files. pdf
KPL: A Kernel Programming Language (207 pages)
This document describes the KPL programming language, which is an integral part of the Blitz-64 Computer System. KPL has many of the features in Java, C, and C++. pdf
KPL Syntax (18 pages)
This document specifies the syntax of the programming language of the Blitz-64 Computer System. pdf
Blitz-64: Software Reference Manual (217 pages)
This document describes the existing Blitz-64 software, including all the commonly used KPL functions. pdf
Blitz-64: Emulator Reference Manual (147 pages)
This document describes the Blitz-64 virtual machine emulator. It starts with an example debugging session to illustrate the built-in debugging functionality. It also includes detailed descriptions of the commands. pdf
Blitz-64: Memory-Mapped I/O Devices (64 pages)
This document specifies the peripheral devices supported at this time by the Blitz-64 emulator and by the MicroBlitz Verilog/FPGA implementation. pdf
MicroBlitz Overview (4 pages)
MicroBlitz is a hardware implementation of the Blitz-64 processor core, written in SystemVerilog, which runs on an FPGA (the Terasic Cyclone V GX). pdf
Blitz-64: Guide to Adding New Instructions (36 pages)
This document reviews the steps required in order to add a new instruction to the Blitz-64 ISA. pdf
The Goals of the Blitz-64 Project (15 pages)
The size and complexity of modern computing systems is terrifying. A single human mind can no longer understand the machines upon which our population, economy, and future depend. Is reliance on the legacy software monoculture sustainable in the current hostile cyber environment or is speculative innovation crucial for growth and evolution? Is efficiency always the ultimate objective or, for mission-critical applications, is it wiser to emphasize simplicity, reliability, and debugging support? Blitz-64 is a radical challenge to traditional design choices, an experimental foray into unexplored regions of hardware and software design space. pdf

Additional Documentation

Thread Scheduling Data Structures: An Empirical Study (50 pages)
OS kernels employ a number of algorithms to schedule threads using different data structures, such as FIFO lists, sorted linked lists, red-black trees, and multiple run queues with one per scheduling priority. What are the relative costs associated with these different approaches? A number of empirical tests were performed and the results and conclusions are reported here. pdf
An Overview of Unicode including ASCII and UTF-8 (21 pages)
Unicode is introduced and explained. The ASCII character set is listed. The UTF-8 encoding is introduced and explained. pdf
An Overview of Floating Point Numbers (65 pages)
An introduction to floating point; representation of single and double types; ranges; denormalized numbers; special values and special cases; rounding rules; exceptional conditions; comments on implementation. pdf
Copyright
Blitz-64 is free and open. Please use it. Copyright Notice

Code

Getting Started: Download Instructions pdf
Download this file: blitz.tar.gz
Or just browse the code files: click here

Videos

Introduction to the Blitz-64 Processor Core (33 mins)

Or click here: https://youtu.be/bwK0Z6IWBBw
An Overview of the ISA (16 mins)

Or click here: https://youtu.be/eTZWD2pRJ0U
Motivation and Philosophy (6 mins)

Or click here: https://youtu.be/tO0SPRDUEBA
Blitz-64 Architecture (2 hours)

Or click here: https://youtu.be/R8tkh5e0_XA